
2004 Microchip Technology Inc.
DS30491C-page 245
PIC18F6585/8585/6680/8680
FIGURE 18-11:
SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
TABLE 18-7:
REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
RC7/RX/DT pin
RC6/TX/CK pin
Write to
TXREG Reg
TXIF bit
TRMT bit
bit 0
bit 1
bit 2
bit 6
bit 7
TXEN bit
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
INTCON
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
0000 0000
PIR1
PSPIF
ADIF
RCIF
TXIF
SSPIF
CCP1IF
TMR2IF
TMR1IF
0000 0000
PIE1
PSPIE
ADIE
RCIE
TXIE
SSPIE
CCP1IE
TMR2IE
TMR1IE
0000 0000
IPR1
PSPIP
ADIP
RCIP
TXIP
SSPIP
CCP1IP
TMR2IP
TMR1IP
1111 1111
RCSTA
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D
0000 000x
TXREG
USART Transmit Register
0000 0000
TXSTA
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
TX9D
0000 0010
BAUDCON
—
RCIDL
—
SCKP
BRG16
—
WUE
ABDEN
-1-0 0-00
SPBRGH
Baud Rate Generator Register, High Byte
0000 0000
SPBRG
Baud Rate Generator Register, Low Byte
0000 0000
Legend:
x
= unknown, - = unimplemented, read as ‘0’. Shaded cells are not used for synchronous master transmission.